JPH0134491B2 - - Google Patents

Info

Publication number
JPH0134491B2
JPH0134491B2 JP57178855A JP17885582A JPH0134491B2 JP H0134491 B2 JPH0134491 B2 JP H0134491B2 JP 57178855 A JP57178855 A JP 57178855A JP 17885582 A JP17885582 A JP 17885582A JP H0134491 B2 JPH0134491 B2 JP H0134491B2
Authority
JP
Japan
Prior art keywords
synchronization pattern
shift register
frame synchronization
circuit
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57178855A
Other languages
English (en)
Japanese (ja)
Other versions
JPS5967746A (ja
Inventor
Masanori Kajiwara
Takao Morya
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57178855A priority Critical patent/JPS5967746A/ja
Publication of JPS5967746A publication Critical patent/JPS5967746A/ja
Publication of JPH0134491B2 publication Critical patent/JPH0134491B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/04—Speed or phase control by synchronisation signals
    • H04L7/041—Speed or phase control by synchronisation signals using special codes as synchronising signal

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Time-Division Multiplex Systems (AREA)
JP57178855A 1982-10-12 1982-10-12 多点監視フレ−ム同期パタ−ン検出回路 Granted JPS5967746A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57178855A JPS5967746A (ja) 1982-10-12 1982-10-12 多点監視フレ−ム同期パタ−ン検出回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57178855A JPS5967746A (ja) 1982-10-12 1982-10-12 多点監視フレ−ム同期パタ−ン検出回路

Publications (2)

Publication Number Publication Date
JPS5967746A JPS5967746A (ja) 1984-04-17
JPH0134491B2 true JPH0134491B2 (en]) 1989-07-19

Family

ID=16055853

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57178855A Granted JPS5967746A (ja) 1982-10-12 1982-10-12 多点監視フレ−ム同期パタ−ン検出回路

Country Status (1)

Country Link
JP (1) JPS5967746A (en])

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464930U (en]) * 1990-10-09 1992-06-04

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0732388B2 (ja) * 1985-02-15 1995-04-10 日本電気株式会社 信号判定装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS533723A (en) * 1976-06-30 1978-01-13 Fujitsu Ltd Frame synchronous system
JPS5787252A (en) * 1980-11-18 1982-05-31 Fujitsu General Ltd Compensating system for step out of pcm signal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0464930U (en]) * 1990-10-09 1992-06-04

Also Published As

Publication number Publication date
JPS5967746A (ja) 1984-04-17

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